1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to a method for manufacturing a semiconductor device using a insulating film having a low relative dielectric constant as an interlayer insulating film.
2. Background Art
In recent years, the speed of semiconductor devices has markedly risen, and concurrently, transmission delay due to lowered signal transmission speed caused by the parasitic capacitance between wiring resistances and wirings in multi-layer wiring portions has caused problems. Such problems tend to be more significant with increase in the wiring resistance and the parasitic capacitance due to the reduction of wiring width and wiring distance accompanying the high integration of semiconductor devices.
Heretofore, in order to prevent the signal delay due to increase in wiring resistance and parasitic capacitance, copper wirings substituting aluminum wirings have been introduced, and the use of a insulating film having a low relative dielectric constant (hereafter referred to as “low-k film”) as an interlayer insulating film has been examined.
The methods for forming copper wiring using a low-k film include the Damascene method (e.g., refer to Japanese Patent Application Laid-Open No. 2000-36484). This method has been known as the technique for forming wiring without etching copper, because copper is more difficult to control the etching rate than aluminum.
Specifically, the Damascene method is a method wherein an etching-stopper film, a low-k film and a cap film are formed on a lower-layer wiring in this order, a wiring trench is formed by dry etching using a resist film as a mask, the resist film is removed by ashing, and then, a copper layer is buried in the wiring trench to form a copper wiring layer. The copper layer can be buried by forming the copper layer using a plating method so as to fill the wiring trench, and then by planarizing the surface using a CMP (chemical-mechanical polishing) method so as to leave the copper-layer only in the wiring trench.
In the above-described step of forming the wiring trench, a fluorine-containing gas is used as the etching gas. Here, in order to form the wiring trench having an ideally rectangular cross section, the pressure during etching is preferably as high as about 30 mTorr to 300 mTorr (about 4 Pa to about 40 Pa) to enhance isotropy. However, in isotropic etching, collision of active species formed by plasma applies large impact to the low-k film. Therefore, for example, when a porous MSQ (methyl silsesquioxane) film is used as the low-k film, there is a problem that methyl groups (—CH3) in the vicinity of the sidewall are released by collision to form a damaged layer, and the relative dielectric constant of the film rises.
When etching is performed in the high-pressure region, fluorine derived from the etching gas is, easily incorporated in the low-k film. If the moisture incorporated in the low-k film in a plating step reacts with fluorine due to heat treatment, hydrofluoric acid (HF) is formed in the low-k film. Since the hydrofluoric acid corrodes the low-k film, voids are formed in the low-k film, and cause a problem of lowering the electrical properties and the reliability of semiconductor devices. Specifically, since the formation of voids lowers the mechanical strength of the low-k film and reduces the adhesion area between the upper-layer film and the lower-layer film, the films are easily peeled off during polishing by a CMP method.
FIG. 16 is a sectional view of a semiconductor device formed using a conventional method. In FIG. 16, a copper wiring layer 29 is formed in an etching stopper film 26, a low-k film 27, and a cap film 28 formed on a lower-layer wiring 25. Reference numerals 30, 31 and 32 denote a barrier metal film, a seed copper film, and a copper layer, respectively. On the sidewall portion of the low-k film 27, a damaged-film 33 is formed in the dry etching step. Fluorine incorporated in the low-k film 27 corrodes the low-k film 27, and a large number of voids 34 are formed.
On the other hand, to cope with the problem that the cross section of the opening becomes a Boeing shape when the low-k film is etched using a fluorocarbon-based gas, a method wherein etching is performed using a mixture gas containing N2 (nitrogen) and H2 (hydrogen) under a low pressure has been proposed (e.g., Patent Document 1).
However, a fluorine-containing gas is not used as the etching gas in the conventional method. The problems of the damage of the low-k film and the voids formed in the low-k film due to dry etching are not solved in the conventional method.